RAM and ROM Testing Complete
Today I managed to iron out all the bugs associated with the memory parts. Again, automating the testing helped a lot.
Now all the parts pass the automated tests. Yippee!
The Truth Table approach needed some appreciation of the sequence of applying input values since, in computer circuits there is synchronization with a clock, but we are testing here in an asynchronous fashion.
So it is important to not change control signals together at once in this case. For example, the input address may change whilst the /OE
pin is low but that signal will be made high in the same row of Truth Table settings, and the output will be changed unexpectedly during the test.
Another small detail was with my encoding scheme for Bus pin names. I was upper-casing them when creating the Pin label text but, an example name may be Din
or Dout
, so I needed to use the String Capitalize method instead.
Another aspect of the RAM Memory in particular is a Memory Viewer and Editor Tool. This can flip modes between 8-bit hex, 16-bit hex, and binary. Also, the Player may change the size and bit-length of the memory. So I needed to do some debugging to get all of this working well.
Say for example the memory is switched to a 16 bit device and the memory contents are edited. We have to consider what happens if the device is then flipped to an 8-bit device. We want to make the effects seem logical and not lead to confusion.
So next I can probably implement the pin labelling feature that I think is necessary in order to get very close to an MVP (Minimum Viable Product).
More Devlog entries
Most recent first
- 2021 10 02 New Release of Digital Logic Simulator
- 2021 08 28 Nested Sub Blocks
- 2021 08 27 Debugging with a log file
- 2021 08 26 Testing Circuit Blocks
- 2021 08 24 Bug Fixing with Blocks
- 2021 08 22 Debugging Circuit Blocks
- 2021 08 21 Circuit Blocks Update
- 2021 08 18 Circuit Blocks
- 2021 08 16 Highlighting of wires
- 2021 08 12 Adding Tutorial Content
- 2021 08 07 Numbers Scene
- 2021 08 06 Numbers Tabbed Scene
- 2021 08 04 Number Display Widget
- 2021 07 26 Logic Simulator Update
- 2021 07 24 - Launch of V1.0
- 2021 07 23 - Truth Tables
- 2021 07 22 Progress Update
- 2021 07 21 - Simple Computer Simulation
- 2021 07 16 - Community Forum
- 2021 07 15 - Community News
- 2021 07 11 - Save and Load ROM Data
- 2021 07 09 - Documentation About The Logic Simulator
- 2021 07 08 - Big Progress
- 2021 07 06 - Implementing Tests
- 2021 07 05 - Cool algorithm for binary text string
- 2021 07 04 - Debugging Complex Situations
- 2021 06 30 - End of June - Refactoring Continues
- 2021 06 29 Community
- 2021 06 28 Implementing More OOP
- 2021 06 27 Memory Parts
- 2021 06 26 Improving the Memory Manager
- 2021 06 25 Memory Data
- 2021 06 24 Memory Management
- 2021 06 23 First Devlog Entry