Simple Computer Simulation
As a test of the application code and to come up with a kind of boss level, I have been working out how to simulate a simple computer.
Although this is quite simple, I wanted it to be able to run assembly language code with a reasonable variety of instructions. So there is a program memory and a micro-instruction memory. Some simple computer designs only use one memory. Also, it is 8-bit.
Creating this highlighted a few things that could be simplified such as removing unused features such as
LD pins on devices.
I made some changes to an architecture design that I was basing it off where I removed Register B (to get 1 extra address bit) and expanded the ROM from 32 words to 64 words. This allowed for inclusion of conditional jumps using the ALU status flags and including AND, OR, and A-B functions of the ALU. Without these features it would have been too primitive to write meaningful programs I think.
Even with the expanded memory, I had to drop
HALT instructions, which I hope is not a problem.
Here is a spreadsheet that I created to plan out the micro-instructions (these instructions control the signals to the circuit elements in a sequence to perform each assembly language instruction):
For the conditional jumps, I make them affect one address line when the Jump instructions are addressed. This wastes some memory positions where each Jump consumes 8 memory addresses. So half of the ROM is taken by the conditional Jump code. And multiplexers are needed for the external logic.
It will be interesting to have a game player create this kind of thing from scratch, and then run code on it. I will have to provide a lot of hints I think.
For sure, I will have to examine some really simple CPU architectures before players have to tackle this. These should have a single memory of 32 words and combine instruction and data/address into each word in the memory i.e. program the ROM with everything it needs to run its application.
More Devlog entries
Most recent first
- 2021 10 02 New Release of Digital Logic Simulator
- 2021 08 28 Nested Sub Blocks
- 2021 08 27 Debugging with a log file
- 2021 08 26 Testing Circuit Blocks
- 2021 08 24 Bug Fixing with Blocks
- 2021 08 22 Debugging Circuit Blocks
- 2021 08 21 Circuit Blocks Update
- 2021 08 18 Circuit Blocks
- 2021 08 16 Highlighting of wires
- 2021 08 12 Adding Tutorial Content
- 2021 08 07 Numbers Scene
- 2021 08 06 Numbers Tabbed Scene
- 2021 08 04 Number Display Widget
- 2021 07 26 Logic Simulator Update
- 2021 07 24 - Launch of V1.0
- 2021 07 23 - Truth Tables
- 2021 07 22 Progress Update
- 2021 07 16 - Community Forum
- 2021 07 15 - Community News
- 2021 07 11 - Save and Load ROM Data
- 2021 07 09 - Documentation About The Logic Simulator
- 2021 07 08 - Big Progress
- 2021 07 07 - RAM and ROM Testing Complete
- 2021 07 06 - Implementing Tests
- 2021 07 05 - Cool algorithm for binary text string
- 2021 07 04 - Debugging Complex Situations
- 2021 06 30 - End of June - Refactoring Continues
- 2021 06 29 Community
- 2021 06 28 Implementing More OOP
- 2021 06 27 Memory Parts
- 2021 06 26 Improving the Memory Manager
- 2021 06 25 Memory Data
- 2021 06 24 Memory Management
- 2021 06 23 First Devlog Entry