First Devlog Entry
Well, here we are!
Over the last few days I have been furiously developing the Logic Simulation project. I feel like I am close to an alpha release.
Yesterday I implemented an ALU and Bus input multiplexer.
- Added sliders to input nodes to set input values
- Made new wire connections propagate their state because that would be expected behavior but had to account for doing this in reverse too
- Changed pinout of multiplexer
- Implemented saving of graph settings with circuits
- Started creating a memory part — pondered how to load in ROM data
- Added a Downloads page to this site and added this Devlog section (easy to do with Hugo)
The reasoning here is that very few comments will be submitted on a low traffic site such as this per page, and it’s better to condense them down to one community page I think. But need to track the originating topic to add context to the comment.
The comments should be visible to people that post, and I can transfer the comments to HTML later after moderation. Early thoughts so far.
More Devlog entries
Most recent first
- 2021 07 26 Logic Simulator Update
- 2021 07 24 - Launch of V1.0
- 2021 07 23 - Truth Tables
- 2021 07 22 Progress Update
- 2021 07 21 - Simple Computer Simulation
- 2021 07 16 - Community Forum
- 2021 07 15 - Community News
- 2021 07 11 - Save and Load ROM Data
- 2021 07 09 - Documentation About The Logic Simulator
- 2021 07 08 - Big Progress
- 2021 07 07 - RAM and ROM Testing Complete
- 2021 07 06 - Implementing Tests
- 2021 07 05 - Cool algorithm for binary text string
- 2021 07 04 - Debugging Complex Situations
- 2021 06 30 - End of June - Refactoring Continues
- 2021 06 29 Community
- 2021 06 28 Implementing More OOP
- 2021 06 27 Memory Parts
- 2021 06 26 Improving the Memory Manager
- 2021 06 25 Memory Data
- 2021 06 24 Memory Management